GPU Top Level Physical Design Engineer Job at Apple Inc., Austin, TX

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  • Apple Inc.
  • Austin, TX

Job Description

Do you love creating sophisticated solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient GPU! You’ll ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means crafting and building the technology that fuels Apple’s devices. Together, we enable our customers to do all the things they love with their devices! This role requires a mix of strategic engineering along with hands-on, technical work, being responsible for implementing complete chip design from netlist to tapeout and having hands-on experience in physical design and large chip integration.

Description

• Collaborate with FE team to understand chip architecture and drive physical aspects early in design cycle. • Drive innovation with the physical design team, developing methodologies and “best known methods” to enable best-in-class GPU design. • Develop PD guidelines and checklists, drive execution, and supervise progress. Be the focal point for place and route integration at the top level. • Drive the work among PnR engineers to set goals, plan short and long-term work comprehending dependencies between different domains like top, STA, block place and route. • Communicate and drive the needs of PD with multi-functional teams that will enable achieving the goals of the back-end design for the project. • Reach new career highs as you resolve design and flow issues related to physical design, identify potential solutions and drive execution. • If you are a confident problem solver who thrives under pressure to find new, creative solutions, we are excited to hear from you!

Minimum Qualifications

Key Qualifications

  • Deep experience with all aspects of ASIC integration including Floorplanning, Clock and Power distribution, global signal planning, I/O planning and hard IP integration.
  • Deep knowledge of GPU issues such as multiple voltage and clock domains, ESD strategies, mixed signal block integration, and package interactions.
  • Familiar with hierarchical design approach, top-down design, budgeting, timing, and physical convergence.
  • Depth of expertise on integrating IP from both internal and external vendors and able to specify and drive IP requirements in the physical domain.
  • Experience with large subsystem designs (>20M gates) with frequencies in excess of 1GHz applying brand new technologies.
  • Familiar with various process related design issues including design for yield and manufacturability, multi Vt strategies and thermal Mgt.
  • Experience in technical project leadership and generating results that have had impact on project completion and objectives.
  • Track record of applying creative thinking to strategically solve problems that have impact for a project, group, or organization.
  • Consistent track record in solving complex PD and multi-functional problems, driving results directly and/or leading a team of engineers to innovate and execute on extraordinary GPU designs.
  • From a CAD tool perspective, experience with floorplanning tools, P&R flows, timing verification and physical design verification flows is required.

Preferred Qualifications

Education & Experience

We are looking for candidates with a minimum of BS + 10 years of relevant experience.

Additional Requirements

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
• Collaborate with FE team to understand chip architecture and drive physical aspects early in design cycle. • Drive innovation with the physical design team, developing methodologies and “best known methods” to enable best-in-class GPU design. • Develop PD guidelines and checklists, drive execution, and supervise progress. Be the focal point for place and route integration at the top level. • Drive the work among PnR engineers to set goals, plan short and long-term work comprehending dependencies between different domains like top, STA, block place and route. • Communicate and drive the needs of PD with multi-functional teams that will enable achieving the goals of the back-end design for the project. • Reach new career highs as you resolve design and flow issues related to physical design, identify potential solutions and drive execution. • If you are a confident problem solver who thrives under pressure to find new, creative solutions, we are excited to hear from you! We are looking for candidates with a minimum of BS + 10 years of relevant experience.

Job Tags

Temporary work,

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